Computational requirements for AI have been growing at an exponential rate. New innovation is required across hardware and software to deliver computational throughput needed to advance AI.
One of the promising areas of research to address this growing compute gap is to reduce the numeric precision requirements for deep learning to improve memory and computational efficiencies. Reduced-precision methods exploit the inherent noise-resilient properties of deep neural networks to improve compute efficiency.
Intel plans to support this format specification across its AI product roadmap for CPUs, GPUs and other AI accelerators, including Habana® Gaudi® deep learning accelerators.
FP8 minimizes deviations from existing IEEE 754 floating point formats with a good balance between hardware and software to leverage existing implementations, accelerate adoption and improve developer productivity.
The guiding principle of this format proposal from Arm, Intel and Nvidia is to leverage conventions, concepts and algorithms built on IEEE standardization. This enables the greatest latitude for future AI innovation while still adhering to current industry conventions.